I’m a PhD student at IIT Madras advised by Pratyush Kumar and Prof. V. Kamakoti. Previously, I was an Oveseas Doctoral Scholar at Purdue University advised by Prof. Anand Raghunathan.

I work on improving the resource efficiency of Deep Neural Networks (DNNs) and Deep Learning (DL) systems. This is achieved across three principal axes: Building efficient systems, efficient design methodolgies, and efficient networks.

I am also passionate about micro-architectural security - specifically on side-channel attacks and defenses. I have actively worked on building secure micro-architectures that detect and thwart timing and power side-channel attacks. I am fortunate to have Prof. Chester and Biswa as academic collaborators in these topics of interest.

I was an integral part of the SHAKTI processor program, involved in all facets of the chip-design stack from RTL design to post silicon validation of India’s very first indigenous microprocessor family: C-Class. The design was taped-out on Intel’s 22nm FFL process and SCL’s 180nm process and boots linux successfully. I was also leading the AI/ML accelerator development within the SHAKTI group.

Selected Honors

• Best paper award at HOST 2020
• Intel India Research Fellowship, 2020-21
• DAC young student fellow, 2020
• ANSYS PhD fellowship, 2020
• Recipient of SERB’s Overseas Visiting Doctoral Fellowship
• Finalist of the Qualcomm Innovation Fellowship India, 2019 (28/136 finalists)
• Richard Newton Young Student Fellow, DAC 2018

Publications

• Vinod Ganesan, Gowtham Ramesh, Pratyush Kumar, “SuperShaper: Task-Agnostic Super Pre-training of BERT Models with Variable Hidden Dimensions”, under review. (paper)
• Vinod Ganesan, Pratyush Kumar, “Design and Scaffolded Training of an Efficient DNN Operator for Computer Vision on the Edge”, Special Issue on Accelerating AI on the Edge, TECS 2022. (paper)
• Vinod Ganesan, Surya Selvam, Sanchari Sen, Pratyush Kumar, and Anand Raghunathan, “A Case for Generalizable DNN Cost Models for Mobile Devices”, in proceedings of International Symposium on Workload Characterization (IISWC), 2020. (paper) (slides)
• Vinod Ganesan, Sanchari Sen, Pratyush Kumar, Neel Gala, Kamakoti Veezhinathan and Anand Raghunathan, “Sparsity-Aware Caches to Accelerate Deep Neural Networks”, in proceedings of Design, Automation & Test in Europe (DATE), 2020. (paper)
• Pranav Gadikar, Vinod Ganesan, Pratyush Kumar, “Generalized Weight Agnostic Neural Networks for Configurable and Continual Autonomous Systems”, AIMLSystems, 2021. (paper)
• Nikhilesh Singh, Vinod Ganesan, Chester Rebeiro, “Transient Micro-Architectural Attacks”, Book chapter, Handbook of Computer Architecture, Springer 2021
• Surya Selvam, Vinod Ganesan, Pratyush Kumar, “FuSeConv: Fully Separable Convolutions for Fast Inference on Systolic Arrays”, to appear in proceedings of Design, Automation & Test in Europe (DATE), 2021. (paper)
• Vishal Gupta, Vinod Ganesan, Biswabandan Panda, “Seclusive Cache Hierarchy for Mitigating Cross-Core Cache and Coherence Directory Attacks”, to appear in proceedings of Design, Automation & Test in Europe (DATE), 2021. (paper) (code) (talk)
• Muhammad Arsath, Vinod Ganesan, Rahul Bodduna and Chester Rebeiro, “PARAM: A Microprocessor Hardened for Power Side-Channel Attack Resistance”, in proceedings of International Symposium on Hardware Oriented Security and Trust (HOST), 2020. (paper) (Awarded best paper)
• Rahul Bodduna, Vinod Ganesan, Patanjali SLPSK, Kamakoti Veezhinathan and Chester Rebeiro, “BRUTUS: Refuting the Security Claims of the Cache Timing Randomization Countermeasure proposed in CEASER”, in Computer Architecture Letters (CAL), 2020. (paper)

Talks

• Delivered a talk on the 22nm SHAKTI C-Class tapeout in RISC-V Workshop (2018) representing the SHAKTI group (link)

Teaching

• I served as one of the lead teaching assistants for the first and second offering of the graduate level course at IITM on Systems Engineering for Deep Learning.

Service

• Reviewer, IEEE S&P 2021